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general description the MAX3341E usb level translator converts logic-level signals to usb signals, and usb signals to logic-level signals. an internal 1.5k ? usb termination resistor sup- ports full-speed (12mbps) usb operation. the MAX3341E provides built-in ?5kv esd-protection cir- cuitry on the usb i/o pins, d+ and d-, and v cc . the MAX3341E operates with logic supply voltages as low as 1.8v, ensuring compatibility with low-voltage asics. the suspend mode lowers supply current to less than 50?. a unique enumerate feature allows changes in usb communication protocol while power is applied. the MAX3341E is fully compliant with usb specification 1.1, and full-speed operation under usb specification 2.0. the MAX3341E has a usb detect that monitors the usb bus for insertion and signals this event. the MAX3341E is available in the miniature 4 ? 4 ucsp, as well as the small 16-pin tssop, and is specified over the extended temperature range, -40? to +85?. applications cell phones pc peripherals information appliances data cradles pdas mp3 players digital cameras features 15kv esd protection on d+ and d- complies with usb standard 1.1 (full speed 2.0) usb skew independent of input skew separate vp and vm inputs/outputs v l down to 1.8v allows connection with low- voltage asics reenumerate with power applied usb detect function allows single-ended or differential logic i/o internal linear regulator allows direct powering from the usb internal termination resistor for full-speed operation three-state outputs no power-supply sequencing required driver active in suspend mode available in miniature chip-scale package MAX3341E 15kv esd-protected usb level translator in ucsp with usb detect ________________________________________________________________ maxim integrated products 1 ordering information 19-2321; rev 0; 4/02 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. part temp range pin-package MAX3341Eeud -40 c to +85 c 16 tssop MAX3341Eebe* -40 c to +85 c4 ? 4 ucsp** pin configurations appear at end of data sheet. ucsp is a trademark of maxim integrated products, inc. * future product?ontact factory for availability. ** ucsp reliability is integrally linked to the user? assembly methods, circuit board material, and environment. see the ucsp reliability notice in the ucsp reliability section of this data sheet for more information. usb interface connector v l rcv vpi vmi suspend d+ d- v bus d+ d- gnd system supply voltage usb_det mode vtrm enumerate vpo vmo system interface v cc oe 23.7 ? 23.7 ? MAX3341E gnd 0.1 f 1 f 1 f typical operating circuit
MAX3341E 15kv esd-protected usb level translator in ucsp with usb detect 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v cc = 4v to 5.5v bypassed with 1f to gnd, gnd = 0, v l = 1.8v to 3.6v, d+ to gnd = 15k ? , d- to gnd = 15k ? , enum = v l , t a = t min to t max , unless otherwise noted. typical values are at v cc = 5v, v l = 2.5v, t a = +25 c.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. parameter symbol conditions min typ max units usb supply voltage v cc 4 5.5 v usb supply current i cc data rate = 12mbps, c l = 50pf (figure 6b) 10 20 ma susp = high, enum = low, oe = high 50 susp = high, oe = low 85 usb susp supply current i cc ( susp ) susp = high, enum = high, oe = high 85 a v cc supply current i cc (< 3v) v cc < 3v 80 a d + /d - leakag e c ur r ent i d+/d- (3v) v cc = 3v; d+, d- < 3.6v 10 a v l suspend supply current i l ( susp ) susp = high, 0 < v cc < 5.5v 20 a logic-side i/o v l input range v l 1.8 3.6 v input high voltage v ih susp, mode, enum, oe , vmo, vpo 2/3 ? v l v input low voltage v il susp, mode, enum, oe , vmo, vpo 0.4 v output voltage high v oh vpi, vmi, rcv, usb_det; i source = 1ma v l - 0.2 v output voltage low v ol vpi, vmi, rcv, usb_det; i sink = -1ma 0.4 v input leakag e c ur r ent s u sp , mod e , e n um , oe , vm o, v p o = 0 or v l 1 10 a usb-side i/o output voltage low v ol d+ or d- 0.3 v output voltage high v oh d+ or d- 2.8 3.6 v input impedance z in three-state driver 1 m ? s i ng l e- e nd ed inp ut v ol tag e h i g hv ih 2.0 v s i ng l e- e nd ed inp ut v ol tag e low v il 0.8 v receiver single-ended hysteresis v hys 200 mv differential input sensitivity v diff 200 mv note 1: guaranteed for v cc < +3.7v only. note 2: absolute maximum rating for input voltage (d+, d-) with v cc > +3.7v is -0.3v to (v cc +0.3v). note 3: external 23.7 ? resistors connected to d+ and d-. (all voltages refer to gnd unless otherwise noted.) supply voltage (v cc ) ...............................................-0.3v to +6v output of internal regulator (vtrm) (note 1) ..........-0.3v to +6v input voltage (d+, d-) (notes 1, 2) ..........................-0.3v to +6v system supply voltage (v l ) .....................................-0.3v to +6v rcv, susp, vmo, mode, vpo, oe , vmi, vpi, usb_det, enum...................................-0.3v to (v l + 0.3v) short-circuit current (d+, d-) to v cc or ground (note 3) .........................................................continuous maximum continuous current (all other pins) ..................15ma continuous power dissipation (t a = +70 c) 16-pin tssop (derate 7.1mw/ c above +70 c) .........571mw 4 ? 4 ucsp (derate 8.2 mw/ c above +70 c) ............659mw operating temperature range ...........................-40 c to +85 c junction temperature ......................................................+150 c storage temperature range .............................-65 c to +150 c
MAX3341E 15kv esd-protected usb level translator in ucsp with usb detect _______________________________________________________________________________________ 3 electrical characteristics (continued) (v cc = 4v to 5.5v bypassed with 1f to gnd, gnd = 0, v l = 1.8v to 3.6v, d+ to gnd = 15k ? , d- to gnd = 15k ? , enum = v l , t a = t min to t max , unless otherwise noted. typical values are at v cc = 5v, v l = 2.5v, t a = +25 c.) parameter symbol conditions min typ max units input common-mode voltage range v cm 0.8 2.5 v driver output impedance z out including 23.7 ? ( 1%) external resistors 28.5 43.5 ? internal resistor r pu 1.425 1.500 1.575 k ? termination voltage vtrm 3.0 3.3 3.6 v v usblh 4.0 usb_det threshold v usbhl 3.7 v usb_det hysteresis v usbhys 25 mv linear regulator power-supply rejection ratio psrr f = 10khz, c out = 1f, d+/d- load 30 db external capacitor c out compensation of linear regulator 1 f esd protection (v cc , d+, d-) human body model 15 kv ie c 1000- 4- 2 ai r - gap d i schar g e 15 kv ie c 1000- 4- 2 c ontact d i schar g e 8 kv timing characteristics (v cc = 4v to 5.5v, gnd = 0, v l = 1.8v to 3.6v, d+ to gnd = 15k ? , d- to gnd = 15k ? , enum = v l , t a = t min to t max , unless otherwise noted. typical values are at v cc = 5v, v l = 2.5v, t a = +25 c.) (figures 2 6) parameter symbol conditions min typ max units oe to transmit delay enable time t pzd figure 6c 15 80 ns oe to driver three-state delay driver disable time t pdz figure 6c 25 ns usb detect signal delay t dusb figure 6b 7.5 s transmitter t plh1 ( drv ) mode = high , figure 6c 30 vpo/vmo to d+/d- propagation delay t phl1 ( drv ) mode = high, figure 6c 30 ns t plh0 ( drv ) mode = low, figure 6c 35 vpo to d+/d- propagation delay t phl0 ( drv ) mode = low, figure 6c 35 ns rise time d+/d- t r 420ns fall time d+/d- t f 420ns rise- and fall-time matching t r /t f (note 4) 90 110 % output signal crossover v crs 1.3 2 v differential receiver (figure 6a) t plh ( rcv ) 30 d+/d- to rcv propagation delay t phl ( rcv ) 30 ns rise time rcv t r 15 ns fall time rcv t f 15 ns
MAX3341E 15kv esd-protected usb level translator in ucsp with usb detect 4 _______________________________________________________________________________________ typical operating characteristics (v cc = 5v, v l = 3.3v, t a = +25 c, unless otherwise noted.) differential receiver propagation delay vs. v l max3341 toc01 v l (v) propagation delay (ns) 2.8 2.3 11 14 17 20 8 1.8 3.3 t a = +85 c t a = +25 c t a = -40 c differential receiver propagation delay vs. v cc max3341 toc02 v cc (v) propagation delay (ns) 5.25 5.00 4.75 4.50 4.25 10 12 14 16 18 20 8 4.00 5.50 t a = -40 c t a = +25 c t a = +85 c single-ended receiver propagation delay vs. v l max3341 toc03 v l (v) propagation delay (ns) 2.8 2.3 5 6 7 8 9 10 4 1.8 3.3 t a = -40 c t a = +25 c t a = +85 c single-ended receiver propagation delay vs. v cc max3341 toc04 v cc (v) propagation delay (ns) 5.25 5.00 4.75 4.50 4.25 5 6 7 8 9 10 4 4.00 5.50 t a = -40 c t a = +25 c t a = +85 c time to enter suspend mode vs. v cc max3341 toc05 v cc (v) time (ns) 5.25 5.00 4.75 4.50 4.25 20 25 30 35 40 45 50 15 4.00 5.50 t a = -40 c t a = +25 c t a = +85 c transmitter skew vs. v cc max3341 toc06 v cc (v) transmitter skew (ns) 5.25 5.00 4.75 4.50 4.25 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 1.6 4.00 5.50 t a = -40 c t a = +25 c t a = +85 c timing characteristics (continued) (v cc = 4v to 5.5v, gnd = 0, v l = 1.8v to 3.6v, d+ to gnd = 15k ? , d- to gnd = 15k ? , enum = v l , t a = t min to t max , unless otherwise noted. typical values are at v cc = 5v, v l = 2.5v, t a = +25 c.) (figures 2 6) parameter symbol conditions min typ max units single-ended receivers t plh ( se ) figure 6a 15 d+/d- to vpi or vmi propagation delay t phl ( se ) figure 6a 15 ns rise time vpi and vmi t r(se) measured from 10% to 90%,figure 6a 15 ns fall time vpi and vmi t f(se) measured from 90% to 10%, figure 6a 15 ns time to detect single-ended zero t se0 14 140 ns note 4: production tested at +25 c and +85 c only. limit at -40 c guaranteed by correlation.
MAX3341E 15kv esd-protected usb level translator in ucsp with usb detect _______________________________________________________________________________________ 5 logic current consumption in suspend mode max3341 toc07 v l (v) i vl ( a) 2.8 2.3 5 6 7 8 9 3 4 1.8 3.3 current consumption in suspend mode max3341 toc08 v cc (v) i vcc ( a) 5.25 5.00 4.75 4.50 4.25 22.5 23.0 23.5 24.0 24.5 25.0 25.5 22.0 4.00 5.50 vtrm vs. v cc max3341 toc09 v cc (v) vtrm (v) 5.25 5.00 4.75 4.50 4.25 3.1 3.2 3.3 3.4 3.5 3.0 4.00 5.50 i vtrm = 15ma d- d+ 1v/div rise-and-fall time matching max3341 toc1 0 20ns/div f = 6mhz 2v/div susp suspend response max3341 toc11 100ns/div 0 0 rcv 2v/div vpo transmission in suspend mode (susp = 1) max3341 toc12 2 s/div vmo d+ d- usb_det v cc usb_det response max3341 toc13 10 s/div 0 0 2v/div typical operating characteristics (continued) (v cc = 5v, v l = 3.3v, t a = +25 c, unless otherwise noted.)
MAX3341E detailed description the MAX3341E is a bidirectional level translator that converts single-ended or differential logic-level signals to differential usb signals, and converts differential usb signals to single-ended or differential logic-level signals. the MAX3341E includes an internal 1.5k ? pullup resistor that connects and disconnects d+ to vtrm ( functional diagram ). the MAX3341E is tolerant to power sequencing with either v cc > v l or v l > v cc . additionally, the usb i/o, d+ and d-, and v cc are esd protected to 15kv. the MAX3341E can receive usb power (v cc ) directly from the usb connection, and operates with logic supplies (v l ) down to 1.8v while still meeting the usb physical layer specifications. the MAX3341E supports full-speed (12mbps) usb specifi- cation 2.0 operation. the MAX3341E has a unique enumerate feature that functions when power is applied. driving enum low disconnects the internal 1.5k ? termination resistor from d+ enumerating the usb. this is useful if changes in communication protocol are required while power is applied, and while the usb cable is connected. 15kv esd-protected usb level translator in ucsp with usb detect 6 _______________________________________________________________________________________ pin description pin tssop ucsp name function 1 d2 rcv receiver output. single-ended cmos output. rcv responds to the differential input on d+ and d-. 2 d1 vpo asic voltage positive output. logic-level data into the MAX3341E. 3 c2 mode mode-control input. selects differential (mode 1) or single-ended (mode 0) input for the system side when converting logic-level signals to usb level signals. force mode high to select mode 1. force mode low to select mode 0. 4 c1 vmo asic voltage minus output. logic-level data into the MAX3341E. 5b1 oe output enable. drive oe low to enable data transmission on d+ and d-. drive oe high to disable data transmission or to receive data. 6 b2 susp suspend input. drive susp low for normal operation. drive susp high for low-power state. in low-power state, rcv is low, and vpi/vmi are active. 7 a1 vpi asic voltage positive input. logic-level data output from the MAX3341E. 8 a2 vmi asic voltage minus input. logic-level data output from the MAX3341E. 9 b3 enum enumerate. drive enum high to connect the internal 1.5k ? resistor from d+ to 3.3v. drive enum low to disconnect the internal 1.5k ? resistor. 10 a3 v cc usb-side power-supply input. connect v cc to the incoming usb power supply. bypass v cc to gnd with a 1f ceramic capacitor. 11 a4 gnd ground 12 b4 d- negative usb differential data input/output. connect to the usb s d- signal through a 23.7 ? 1% resistor. 13 c4 d+ positive usb differential data input/output. connect to the usb s d+ signal through a 23.7 ? 1% resistor. 14 d4 vtrm regulated output voltage. 3.3v output derived from the v cc input. bypass vtrm to gnd with a 1f (min) low-esr capacitor such as ceramic or plastic film types. 15 d3 v l system-side power-supply input. connect to the system s logic-level power supply, 1.8v to 3.6v. 16 c3 usb_det usb detector output. a high at usb_det signals to the asic that v cc is present. a low at usb_det indicates that v cc is not present.
device control d+ and d- d+ and d- are the usb side transmitter i/o connec- tions, and are esd protected to 15kv using the human body model, 15kv using iec 1000-4-2 air- gap discharge, and 8kv using iec 1000-4-2 contact discharge, making the MAX3341E ideal for applications where a robust transmitter is required. a 23.7 ? resistor is required on d+ and d- for normal operation (see external resistors ). the MAX3341E contains unique circuitry to ensure the usb skew is independent of the input skew on vpo and vmo. input skews of up to 10ns are ignored and do not show up on the output. enum usb specification 2.0 requires a 1.5k ? pullup resistor on d+ for full-speed (12mbps) operation. controlled by enumerate (enum), the MAX3341E provides this inter- nal 1.5k ? resistor. drive enum high to connect the pullup resistor from d+ to vtrm. drive enum low to disconnect the pullup resistor from d+ to vtrm. vpo/vmo, vpi/vmi, and oe the MAX3341E system-side inputs are vpo and vmo. data from an asic comes into the MAX3341E through vpo and vmo. vpo and vmo operate either differen- tially with vpo as the positive terminal and vmo as the negative terminal, or single ended with vpo as the data input (see mode section). the MAX3341E system-side outputs are vpi, vmi, and rcv. the MAX3341E sends data to an asic through vpi, vmi, and rcv. vpi and vmi are outputs to the single-ended receivers and rcv is the output of the dif- ferential receiver. output enable ( oe ) controls data transmission. drive oe low to enable data transmission on d+ and d-. drive oe high to disable data transmission or receive data. mode mode is a control input that selects whether differential or single-ended logic signals are recognized by the system side of the MAX3341E. drive mode high to select differential mode with vpo as the positive termi- nal and vmo as the negative terminal. drive mode low to select single-ended mode with vpo as the data input (table 1). vtrm vtrm is the 3.3v output of the internal linear voltage regulator. vtrm powers the internal circuitry of the usb side of the MAX3341E. connect a 1f (min) low-esr ceramic or plastic capacitor from vtrm to gnd, as close to vtrm as possible. v cc in most applications, v cc is derived from the usb 5v out- put. if supplying v cc with an alternative power supply such as a lithium-ion battery, the v cc input range is 4.0v to 5.5v. if v cc drops below 4.0v, supply current drops to 10a avoiding excessive battery drain, and d+/d- enter a high-impedance state allowing other devices to drive the lines. bypass v cc to gnd with a 1f ceramic capacitor as close to the device as possible. usb detect usb detect output (usb_det) signals to the asic that v cc is present. a high at usb_det indicates that v cc is present, while a low at usb_det indicates that v cc is not present. susp suspend (susp) is a control input. force susp high to place the MAX3341E in a low-power state. in this state, the quiescent supply current into v cc is less than 50a and rcv goes low. in suspend mode, vpi and vmi remain active as receive outputs and vtrm stays on. the MAX3341E continues to receive data from the usb, allowing the p to sense activity on the d+/d- lines and wake up the MAX3341E. the MAX3341E can also transmit data to d+ and d- while in suspend mode. this function is used to signal a remote wakeup by driving a signal on d+ and d- for a period of 1ms to 15ms. slew rate control is not active during suspend mode, and data can only be sent at data rates up to 200kps. data transfer receiving data from the usb data received from the usb are output to vpi/vmi in either of two ways, differentially or single ended. to receive data from the usb, force oe high and susp low. differential data arriving at d+/d- appear as differ- ential logic signals at vpi/vmi, and as a single-ended logic signal at rcv. if both d+ and d- are low, then vpi and vmi are low, signaling a single-ended zero condi- tion on the bus; rcv is undefined (table 1). transmitting data to the usb the MAX3341E outputs data to the usb differentially on d+ and d-. the logic driving signals may be either dif- ferential or single ended. for sending differential logic, force mode high, force oe and susp low, and apply data to vpo and vmo. d+ then follows vpo, and d- follows vmo. to send single-ended logic signals, force MAX3341E 15kv esd-protected usb level translator in ucsp with usb detect _______________________________________________________________________________________ 7
MAX3341E 15kv esd-protected usb level translator in ucsp with usb detect 8 _______________________________________________________________________________________ table 1a. truth table transmit (susp = 0, oe = 0, enum = x) input output mode vpo vmo d+ d- rcv vpi vmi result 0 0 0 0 1 0 0 1 logic 0 00100x00se0 0 1 0 1 0 1 1 0 logic 1 01100x00se0 10000x00se0 1 0 1 0 1 0 0 1 logic 0 1 1 0 1 0 1 1 0 logic 1 1 1 1 1 1 x 1 1 undefined table 1b. truth table receive (susp = 0, oe = 1, enum = x) input output d+ d- rcv vpi vmi result 0 0 x 0 0 se0 01001 logic 0 10110 logic 1 1 1 x 1 1 undefined input output d+ d- rcv vpi vmi result 00000 vpi/vmi active 01001 vpi/vmi active 10010 vpi/vmi active 11011 vpi/vmi active * timing specifications are not guaranteed for d+ and d-. table 1c. truth table transmit in suspend* (susp = 1, oe = 0, enum = x) input output mode vpo vmo d+ d- rcv vpi vmi result 0 0 0 0 1 0 0 1 logic 0 00100000se0 0 1 0 1 0 0 1 0 logic 1 01100000se0 10000000se0 1 0 1 0 1 0 0 1 logic 0 1 1 0 1 0 0 1 0 logic 1 1 1 1 1 1 0 1 1 undefined table 1d. truth table receive in suspend* (susp = 1, oe = 1, mode = x, vpo/vmo = x, enum = x) * timing specifications are not guaranteed for d+ and d-.
mode, susp, and oe low, and apply data to vpo/vmo. when vmo is high, a single-ended zero con- dition is sent on the bus and rcv is undefined (table 1). esd protection to protect the MAX3341E against esd, d+ and d- have extra protection against static electricity to protect the device up to 15kv. the esd structures withstand high esd in all states normal operation, suspend, and powered down. in order for the 15kv esd structures to work correctly, a 1f or greater capacitor must be con- nected from vtrm to gnd. esd protection can be tested in various ways; the d+ and d- input/output pins are characterized for protection to the following limits: 1) 15kv using the human body model 2) 8kv using the iec 1000-4-2 contact discharge method 3) 15kv using the iec 1000-4-2 air-gap method esd test conditions esd performance depends on a variety of conditions. contact maxim for a reliability report that documents test setup, test methodology, and test results. human body model figure 1a shows the human body model, and figure 1b shows the current waveform it generates when dis- charged into a low impedance. this model consists of a 100pf capacitor charged to the esd voltage of interest, which is then discharged into the test device through a 1.5k ? resistor. iec 1000-4-2 the iec 1000-4-2 standard covers esd testing and per- formance of finished equipment; it does not specifically refer to integrated circuits. the MAX3341E helps the user design equipment that meets level 4 of iec 1000-4-2, with- out the need for additional esd-protection components. the major difference between tests done using the human body model and iec 1000-4-2 is a higher peak current in iec 1000-4-2, because series resistance is lower in the iec 1000-4-2 model. hence, the esd with- stand voltage measured to iec 1000-4-2 is generally lower than that measured using the human body model. figure 1c shows the iec 1000-4-2 model. the air-gap discharge test involves approaching the device with a charged probe. the contact discharge method connects the probe to the device before the probe is energized. machine model the machine model for esd tests all pins using a 200pf storage capacitor and zero discharge resistance. its objective is to emulate the stress caused by contact that MAX3341E 15kv esd-protected usb level translator in ucsp with usb detect _______________________________________________________________________________________ 9 figure 1c. iec 1000-4-2 esd test model charge-current- limit resistor discharge resistance storage capacitor c s 150pf r c 50m ? to 100m ? r d 330 ? high- voltage dc source device under test figure 1b. human body model current waveform i p 100% 90% 36.8% t rl time t dl current waveform peak-to-peak ringing (not drawn to scale) i r 10% 0 0 amperes figure 1a. human body esd test models charge-current- limit resistor discharge resistance storage capacitor c s 100pf r c 1m ? r d 1500 ? high- voltage dc source device under test
MAX3341E occurs with handling and assembly during manufactur- ing. all pins require this protection during manufactur- ing. therefore, after pc board assembly, the machine model is less relevant to i/o ports. applications information external components external resistors two external 23.7 ? 1%, 1/2w resistors are required for usb connection. place the resistors in between the MAX3341E and the usb connector on the d+ and d- lines. see typical operating circuit . external capacitors use three external capacitors for proper operation. use a 0.1f ceramic for decoupling v l , a 1f ceramic for decoupling v cc , and a 1.0f (min) ceramic or plastic filter capacitor on vtrm. return all capacitors to gnd. ucsp reliability the ucsp represents a unique packaging form factor that may not perform equally to a packaged product through traditional mechanical reliability tests. csp reli- ability is integrally linked to the user s assembly meth- ods, circuit board material, and usage environment. the user should closely review these areas when con- sidering use of a csp package. performance through operating life test and moisture resistance remains uncompromised as it is primarily determined by the wafer-fabrication process. mechanical stress performance is a greater considera- tion for a csp package. csps are attached through direct solder contact to the user s pc board, foregoing the inherent stress relief of a packaged product lead frame. solder joint contact integrity must be consid- ered. table 2 shows the testing done to characterize the csp reliability performance. in conclusion, the ucsp is capable of performing reliably through envi- ronmental stresses as indicated by the results in table 2. additional usage data and recommendations are detailed in the ucsp application note, which can be found on maxim s website at www.maxim-ic.com. 15kv esd-protected usb level translator in ucsp with usb detect 10 ______________________________________________________________________________________ d+/d- t pdz t pzd v ohd - 0.3v v old + 0.3v v l 0 v l /2 oe figure 2. enable and disable timing, transmitter vpo d+/d- t phlo v l 0 0.8v 2v v l /2 figure 3. mode 0 timing vpo/vmo d+/d- t plh1 t phl1 v l 0 0.8v 2v v l /2 figure 4. mode 1 timing
MAX3341E 15kv esd-protected usb level translator in ucsp with usb detect ______________________________________________________________________________________ 11 t phl(rcv) t plh(rcv) t phl(se) t plh(se) t plh(se) t phl(se) d+ d- rcv vpi vmi d+/d- rise/fall times 8ns, v l = 1.8v, 2.5v, 3.3v 3v 0v v l v l /2 v l /2 v l /2 0v v l 0v v l 0v figure 5. d+/d- to rcv, vpi, vmi propagation delays
MAX3341E 15kv esd-protected usb level translator in ucsp with usb detect 12 ______________________________________________________________________________________ test conditions duration no. of failures per sample size temperature cycle -35 c to +85 c, -40 c to +100 c 150 cycles, 900 cycles 0/10, 0/200 operating life t a = +70 c 240hr 0/10 moisture resistance +20 c to +60 c, 90% rh 240hr 0/10 low-temperature storage -20 c 240hr 0/10 low-temperature operational -10 c 24hr 0/10 solderability 8hr steam age 0/15 esd 2000v, human body model 0/5 high-temperature operating life t j = +150 c 168hr 0/45 table 2. reliability test data chip information transistor count: 2162 process: bicmos (c) load for enable and disable time, d+/d- (a) load for vpi, vmi, and rcv vmi or vpi or rcv MAX3341E 25pf test point d+ or d- 200 ? 24 ? MAX3341E 50pf gnd or v cc + - test point d+ d- usb_det 23.7 ? c l 15k ? 1.5k ? 3.3v MAX3341E test point (b) load for d+, d-, and usb_det 23.7 ? c l 15k ? test point 25pf figure 6. test circuits
MAX3341E 15kv esd-protected usb level translator in ucsp with usb detect ______________________________________________________________________________________ 13 linear regulator to internal circuits 23.7 ? enum gnd vmi vpi rcv susp mode usb_det v l vpo oe v cc vtrm d- d+ MAX3341E bandgap to internal circuits external resistors 23.7 ? vmo oe 1.5k ? single-ended receivers vbg vbg usb supply transmitter receiver usb_det functional diagram 16 15 14 13 12 11 10 1 2 3 4 5 6 7 usb_det v l vtrm d+ d- vmo mode vpo rcv top view bottom view MAX3341E gnd v cc 9 enum vpi 8 vmi susp tssop ucsp v cc v l gnd vtrm d+ d- vmi mode rcv susp usb_det enum vmo vpo vpi MAX3341E a b c d 1234 oe oe pin configurations
MAX3341E 15kv esd-protected usb level translator in ucsp with usb detect 14 ______________________________________________________________________________________ 4x4 ucsp.eps package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .)
MAX3341E 15kv esd-protected usb level translator in ucsp with usb detect maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 15 ? 2002 maxim integrated products printed usa is a registered trademark of maxim integrated products. tssop,no pads.eps package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .)

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